A novel architecture for Field-Programmable Gate Array-based Ethernet POWERLINK controlled nodes

System analysis, control and data processing


Аuthors

Romanov A. M.

MIREA - Russian Technological University, 78, Vernadsky prospect, Moscow, 119454, Russia

e-mail: romanov@mirea.ru

Abstract

The article solves the problem of Field-Programmable Gate Array (FPGA)-based Ethernet POWERLINK controlled node implementation with minimal application of both logical cells and memory blocks. As a solution, a novel modular architecture is proposed, which resource intensiveness can be flexibly adjusted depending on the required functionality. Unlike previously known solutions, the proposed architecture does not employ soft-processors and does not require the incoming frames buffering. All data is processed “on the fly”, which allows the node to send a response to the request from the managing node with the minimum latency allowable by the Ethernet standard. The novel architecture employs one shared kernel for interaction with the Ethernet physical layer chip (PHY). This kernel forms a common data channel to which all other modules are connected. Each module processes frames of a certain type (synchronous, asynchronous, cross-traffic frame) and generates corresponding responses. Based on the proposed architecture, the first Russian Ethernet POWERLINK device was created, which compliance with the Standard was certified by Ethernet POWERLINK Standardization Group. By the results of experimental studies, it was demonstrated that the novel architecture requires from 3.5 to 9 times less FPGA logic resources, and up to 126 times less block memory for the of Ethernet POWERLINK devices implementation. The result of no less importance is the possibility of proposed solutions implementation based on FPGA chips from Russian vendors, including those in radiation-resistant version, which allows apply them in aerospace technology.

Keywords:

fieldbus, field-programmable gate array, Ethernet POWERLINK, 61158 Standard, domestic element base

References

  1. Smakova E. Elektronnye komponenty, 2009, no. 4, pp. 1 - 4.

  2. Romanov A., Romanov M., Kharchenko A., Kholopov V. Unified architecture of execution level hardware and software for discrete machinery manufacturing control systems // Research and Development (SCOReD), 2016 IEEE Student Conference on, IEEE, 2016. DOI: 10.1109/SCORED.2016.7810088

  3. Baumgartner J., Schoenegger S. POWERLINK and real-time Linux: A perfect match for highest performance in real applications, Twelfth Real-Time Linux Workshop, 2010, available at: https://manualzilla.com/doc/5985800/powerlink-and-real-time-linux--a-perfect-match-for

  4. Wallner W., Baumgartner J. openPOWERLINK in Linux Userspace: Implementation and Performance Evaluation of the Real-Time Ethernet Protocol Stack in Linux Userspace, Proc. 13th Real-Time Linux Workshop (RTLWS), Prague, Czech Republic, 2011, S. 155 - 164.

  5. Andrén F., Strasser T. Distributed open source control with Industrial Ethernet I/O devices // 16th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA'2011), September 5-9, Toulouse, France ETFA2011. IEEE, DOI: 10.1109/ETFA.2011.6059141

  6. Schalk K. et al. Microsecond-precision time stamping in a deterministic distributed sensor network utilizing openPOWERLINK, 2017 IEEE International Conference on Wireless for Space and Extreme Environments (WiSEE 2017), 10-12 October 2017, Montreal, Quebec, Canada, pp. 52 - 56.

  7. openPOWERLINK, available at: http://openpowerlink.sourceforge.net/web/openPOWERLINK.html

  8. IEEE Standard for Industrial Hard Real-Time Communication, IEEE Std 61158-2017 (Adoption of EPSG DS 301).

  9. Viveka J.S.V., Navaneethan S. Open source motor control using Xilinx Spartan-6, International Journal of Advanced Research in Electronics and Communication Engineering (IJARECE), 2015, vol. 4, issue 5, pp. 1277 – 1280.

  10. Idkhajine L. et al. Fully integrated FPGA-based controller for synchronous motor drive, IEEE Transactions on Industrial Electronics, 2009, vol. 5, no. 10, pp. 4006 - 4017.

  11. Liu J. et al. The development of a novel servo motor controller based on EtherCAT and FPGA, 2016 Chinese Control and Decision Conference (CCDC), IEEE, 2016, pp. 3174 - 3179. DOI: 10.1109/CCDC.2016.7531529

  12. Popov B.N., Fam T.T. Trudy MAI, 2005, no. 18, http://trudymai.ru/eng/published.php?ID=3419313.

  13. Knezic M., Dokic B., Ivanovic Z. Performance analysis of the ethernet powerlink pollresponse chaining mechanism, Factory Communication Systems (WFCS), 2015 IEEE World Conference on, IEEE, July 2015, pp. 1 - 4. DOI: 10.1109/WFCS.2015.7160578

  14. Baumgartner J., Schoenegger S. POWERLINK and Real-time Linux: A perfect match for highest performance in real applications, Twelfth Real-Time Linux Workshop, Nairobi, Kenya, 2010, available at: https://www.osadl.org/fileadmin/dam/rtlws/12/Baumgartner.pdf

  15. Reinhart G. et al. Automatic configuration (plug & produce) of industrial ethernet networks, 9th IEEE/IAS International Conference on Industry Applications (INDUSCON), Brazil, 2010, pp. 1-6.

  16. 16. Romanov A.M. Estestvennye i tekhnicheskie nauki, 2013, no. 6, pp. 348 – 361.

  17. Lokhin V.M., Man'ko S.V., Romanov M.P., Romanov A.M. Vestnik MGTU MIREA, 2015, no. 3-1 (8), pp. 230 – 248.

  18. Romanov A., Romanow M. FPGA based implementation of content-addressed memory based on using direct sigma-delta bitstream processing, 2016 IEEE NW Russia Young Researchers in Electrical and Electronic Engineering Conference (EIConRusNW), Saint Petersburg, Russia, 2016, pp. 320 - 324.

  19. Mullov K.D. Trudy MAI, 2016, no. 87, available at: http://trudymai.ru/eng/published.php?ID=69720

  20. Matafonov D.E. Trudy MAI, 2018, no. 103, available at: http://trudymai.ru/eng/published.php?ID=100780


Download

mai.ru — informational site MAI

Copyright © 2000-2020 by MAI

Вход