Features of network traffic processing on third-level switches with open operating systems


Аuthors

Buzhin I. G.*, Antonova V. M.**, Pozdnyakov R. ***, Mironov Y. B.****

Moscow Technical University of Communications And Informatics, 8a, Aviamotornaya Str., Moscow, 111024, Russia

*e-mail: i.g.buzhin@mtuci.ru
**e-mail: xarti@mail.ru
***e-mail: p.v.pozdnyakov@mtuci.ru
****e-mail: i.b.mironov@mtuci.ru

Abstract

In modern control and information processing systems of aerospace aircraft, the use of whitebox switches with open network operating systems based on ASIC network chips as a network infrastructure is gaining popularity, thanks to which various network functions become available, independence from network equipment manufacturers appears. At the same time, the functioning of such devices and the principle of processing network traffic have their own characteristics that should be taken into account when operating white АВТОРЕbox switches. The purpose of the study: to identify the features of network traffic processing in whitebox switches and to develop some recommendations for their elimination. As a result, this article analyzes the hardware and software architecture of network equipment, as a result of which it is revealed that the architecture of a network device consists of a data transmission layer (Data plane) and a control plane. The Data plane layer is represented by an ASIC network chip with SDK and SAI tools. The Control plane level is represented by a CPU chip with a Kernel Routing (Linux) tool and a CLI. Also, as a result of the operation of whitebox switches, such traffic processing features as the desynchronization of Kernel Routing and ASIC, a violation of interface configuration logic and a decrease in port throughput were revealed. To eliminate these shortcomings, some recommendations have been developed, according to which, in order to successfully process traffic in whitebox switches, it is necessary to control the interface configuration on ASIC ingress pipelines, check the synchronization of Kernel routing Linux and ASIC. To maintain the required packet throughput, it is necessary to monitor the correctness of specifying egress interfaces and next-hop when processing traffic from

input ports.

Keywords:

future generation mobile networks, load balancing, network layers, network connectivity, virtualised infrastructure, data networks

References

  1. Tajammal M.B., Durad H., Iqbal R.N. Secure Switch Development using Open Network Linux on Bare Metal Switch, Development of Network Operating System for Bare Metal Switches (Nos), VFAST Transactions on Software Engineering, 2020, vol. 8, no. 1, pp. 43-54. DOI: 10.21015/vtse.v8i1.575

  2. Gupta K. et al. ASIC: Aligning sparse in-the-wild image collections, Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023, pp. 4134-4145. DOI: 10.1109/ICCV51070.2023.00382
  3. Saquetti M. et al. A Terabit Hybrid FPGA-ASIC Platform for Switch Virtualization, 2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), IEEE, 2021, pp. 73-78. DOI: 10.1109/ISVLSI51109.2021.00024
  4. Wang S. et al. Making multi-string pattern matching scalable and cost-efficient with programmable switching asics, IEEE INFOCOM 2021-IEEE Conference on Computer Communications, IEEE, 2021, pp. 1-10. DOI: 10.1109/INFOCOM42981.2021.9488796
  5. Fang J. et al. TB-TBP: a task-based adaptive routing algorithm for network-on-chip in heterogenous CPU-GPU architectures, The Journal of Supercomputing, 2024, vol. 80, no. 5, pp. 6311-6335. DOI: 10.1007/s11227-023-05700-7
  6. Blöcher M. et al. Switches for HIRE: Resource scheduling for data center in-network computing, Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021, pp. 268-285. DOI: 10.1145/3445814.3446760
  7. Von Arnim C. et al. Updating the Linux TAPRIO Scheduler in Deterministic Time, 2022 IEEE 27th International Conference on Emerging Technologies and Factory Automation (ETFA), IEEE, 2022, pp. 1-7. DOI: 10.1109/ETFA52439.2022.9921594
  8. Ejjeh A., Adve V., Rutenbar R. Studying the potential of automatic optimizations in the Intel FPGA SDK for OpenCL, arXiv preprint arXiv:2201.03558, 2022.
  9. Deierling K. NVIDIA's Resource Transmutable Network Processing ASIC, 2023 IEEE Hot Chips 35 Symposium (HCS), IEEE Computer Society, 2023. pp. 1-14. DOI: 10.1109/HCS59251.2023.10254697
  10. Gentile A.F., Fazio P., Miceli G. A Survey on the Implementation and Management of Secure Virtual Private Networks (VPNs) and Virtual LANs (VLANs) in Static and Mobile Scenarios, Telecom–MDPI, 2021, vol. 2, no. 4, pp. 430-445. DOI: 10.3390/telecom2040025
  11. Suresh P. et al. Field-programmable gate arrays in a low power vision system, Computers & Electrical Engineering, 2021, vol. 90, pp. 106996. DOI: 10.1016/j.compeleceng.2021.106996
  12. Rosa E.C., de Oliveira Silva F. A review on recent NDN FIB implementations for high-speed switches, International Conference On Advanced Information Networking and Applications. Cham: Springer International Publishing, 2022, vol. 3, pp. 288-300. DOI: 10.1007/978-3-030-99619-2_28
  13. Amin R. et al. Auto-configuration of ACL policy in case of topology change in hybrid SDN, IEEE Access, 2016, vol. 4, pp. 9437-9450. DOI: 10.1109/ACCESS.2016.2641482
  14. Bruschi D., Ornaghi A., Rosti E. S-ARP: a secure address resolution protocol, 19th Annual Computer Security Applications Conference, Proceedings IEEE, 2003, pp. 66-74. DOI: 10.1109/CSAC.2003.1254311
  15. Huang J. et al. Adjusting packet size to mitigate TCP incast in data center networks with COTS switches, IEEE Transactions on Cloud Computing, 2018, vol. 8, no. 3, pp. 749-763. DOI: 10.1109/TCC.2018.2810870
  16. Ðerić N. et al. Towards Understanding the Performance of Traffic Policing in Programmable Hardware Switches, 2021 IEEE 7th International Conference on Network Softwarization (NetSoft), IEEE, 2021, pp. 70-78. DOI: 10.1109/NetSoft51509.2021.9492560
  17. Ning B. et al. Collective behaviors of mobile robots beyond the nearest neighbor rules with switching topology, IEEE transactions on cybernetics, 2017, vol. 48, no. 5, pp. 1577-1590. DOI: 10.1109/TCYB.2017.2708321
  18. Wu D. et al. Accelerated service chaining on a single switch ASIC, Proceedings of the 18th ACM Workshop on Hot Topics in Networks, 2019, pp. 141-149. DOI: 10.1145/3365609.3365849
  19. Monika B.K., Amaresha S.K., Yellampalli S.S. ASIC implementation of switch architecture used in NoC, 2017 International Conference On Smart Technologies For Smart Nation (SmartTechCon), IEEE, 2017, pp. 758-761. DOI: 10.1109/SmartTechCon.2017.8358473
  20. Piasetzky Y. et al. Switch asic programmability in hybrid mode, 2018 IEEE 26th International Conference on Network Protocols (ICNP), IEEE, 2018, pp. 448-449. DOI: 10.1109/ICNP.2018.00067
  21. Zhang L.L. et al. A scheduler ASIC for a programmable packet switch, IEEE Micro, 2000, vol. 20, no. 1. pp. 42-48. DOI: 10.1109/40.820052
  22. Muratchaev S.S., Volkov A.S., Margaryan R.A., Bakhtin A.A. Trudy MAI, 2022, no. 123. URL: https://trudymai.ru/eng/published.php?ID=165556. DOI: 10.34759/trd-2022-123-13
  23. Bakhtin A.A., Volkov A.S., Solodkov A.V., Sviridov I.A. Trudy MAI, 2021, no. 121. URL: https://trudymai.ru/eng/published.php?ID=162660. DOI: 10.34759/trd-2021-121-13


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