Principles of localization of short-circuit defects in the pins of chips connected in parallel to the digital data bus


DOI: 10.34759/trd-2021-118-15

Аuthors

Grechishnikov V. M.*, Kuritsky A. A.**, Butko A. D.***

Samara National Research University named after Academician S.P. Korolev, 34, Moskovskoye shosse, Samara, 443086, Russia

*e-mail: gv@ssau.ru
**e-mail: samales@mail.ru
***e-mail: butkortf@ssau.ru

Abstract

To improve the reliability of the digital electronic modules of control systems in aviation, various redundancy schemes are often used, based on the parallel connection of the same type of functional elements to the data bus. The functionality of such channels is implemented on super-large integrated circuits (SLIC), made most often in BGA (Ball Grid Array) enclosures and equipped with a JTAG interface in accordance with the IEEE 1149.1 standard. The JTAG interface is the basis for the development of hardware and software tools for boundary scanning, which are widely used not only for programming, but also for rapid contactless search, localization, identification and visualization of defects on assembled printed circuit boards

In the process of automated soldering of BGA chips, defects may occur in the form of a short circuit (bridge) between their terminals located in the subcorp space in the zone of physical inaccessibility to traditional electrical controls. Such defects can be detected using hardware and software boundary scanning. However, due to the parallel connection of chips in the presence of a short circuit only under one of them, the defect will be determined under all, including defect-free, chips at the same time.

The authors investigated the possibilities of the boundary scanning method for localization of short circuits under microcircuits in BGA enclosures connected in parallel to the digital data transmission bus according to the double «hot» redundancy scheme. The calculated values of the currents on the monitored sections of the communication lines were found experimentally, which make it possible to accurately determine the position of the defect under the microcircuits in the BGA enclosures.

The conducted experimental studies have shown that the implementation of the results obtained in the technological processes of production control and diagnostics will significantly reduce the time of searching and restoring the operability of products.

Keywords:

JTAG interface, BGA chip, «short circuit» defect, diagnostics, localization, contactless current sensor, boundary scanning, contour current

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