The software implementation of phase locked loop system

Аuthors

Martirosov V. E.^*, Alekseev G. A.^**

Moscow Aviation Institute (National Research University), 4, Volokolamskoe shosse, Moscow, А-80, GSP-3, 125993, Russia

*e-mail: marti@mai.ru
**e-mail: alexeevg@yandex.ru

Abstract

The aim of this work is to study the methods of calculating the parameters of the digital phase locked loop (PLL) and the creation of its program implementation.
At present are widely used digital information transmission systems. In such systems, the receiver contains a digital part where algorithms of filtration, demodulation and synchronization at various levels are implemented. PLL is used as a basis in a many synchronization systems used in digital telecommunication systems. For example, a PLL is often used for carrier frequency synchronization and establishing of symbol timing.
In this article presents the results of a calculating and software implementation of the digital phase locked loop, which has in its structure proportional-integrating filter — PIF (Lag-Lead passive filter); shows the structural schemes of traditional (analog) and digital PLL systems. Based on the transfer function of analogue proportional-integrating filter structure of its digital realization has been synthesized. The technique of calculation of the PLL of this type is considered. Based on presented structures and the calculated values ​​of the parameters, software implementation of the device has been performed.
As an example, calculation of phase locked loop system for carrier frequency synchronization system of demodulator of digital telecommunication system has been presented. In the calculation were taken into account the following initial data: system data transmission rate is Rb = 600 kbit/s, signal/noise ratio at the demodulator input is 8 dB.
Testing of the developed system with different signal/noise ratio and different frequency offset of input signal from the nominal value has been performed. Analysis of the results showed that the performance of software realization of PLL system meet the requirements of the steady-state phase error, synchronization time and acquisition bandwidth of signal.
The results obtained indicate the possibility of using the considered techniques of designing of the PLL system and the ability to use the developed software model as a research sample, or prototype for software-hardware realization of PLL system as a high frequency synchronization subsystem of quasicoherent demodulators of digital telecommunication systems.

Keywords:

PLL system, quasicoherent reception, software implementation, digital part of receiver

References

1. Martirosov V.E. Optimalniy priem discretnih signalov (Optimum reception of discrete signals), Moscow, Radiotechnika, 2010, 208 p.
2. Vankka J. Direct Digital Synthesizers: Theory, Design and Applications, Doctor`s thesis, Helsinki, Helsinki University of Technology, 2000, 133 p.
3. Gardner F. M. Phaselock Techniques, New Jersey, John Wiley & Sons, Inc., 1979, 285 p.
4. Gardner F. M. Phaselock Techniques, New Jersey, John Wiley & Sons, Inc., 2005, 425 p.

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