Codec design for ternary code

Аuthors

Kuznetsov V. S.^*, Volkov A. S.^**, Solodkov A. V.^***, Loos V. V.^****

National Research University of Electronic Technology, 1, sq. Shokina, Moscow, Zelenograd, 124498, Russia

*e-mail: vitaliy_kuznetsov@hotmail.com
**e-mail: leshvol@mail.ru
***e-mail: solodkov_aw@mail.ru
****e-mail: loos.vladislav@yandex.ru

Abstract

Modern communication systems use forward error-correcting codes and types of digital modulations based on a binary alphabet. The binary alphabet as a whole is a standard in the modern world due to the convenience it provides both in circuit implementations of algorithms in integrated circuits, and when working at a high level of abstraction with mathematical models, etc. However, attempts to switch to the ternary alphabet are well known, since it offers a significant increase in the information capacity of a single character, compared with the binary alphabet. The difficulty lies in the absence of a simple and effective one-to-one transition from the binary alphabet to the ternary alphabet.
The article suggests a way to combine the symbols of two binary alphabets to obtain a ternary alphabet and a way to build an error-correcting code on this alphabet. The proposed error-correcting code on a ternary basis is used in a cascade code together with an orthogonal code and subsequent specialized one-dimensional amplitude modulation. It is shown that the proposed method for constructing an error-correcting code on a ternary basis allows transmitting information at a relative speed of 1.58 bits per period of one clock pulse. A cascade code structure is proposed, consisting of a ternary error-correcting code and an orthogonal code that provides correction of single errors. The system operates on the Shannon bound in a continuous channel with additive white Gaussian noise with sufficient reliability for voice communication and high information transfer rate.
Mathematical models of encoding and decoding units have been developed and tested. The simulation shows that when choosing the codeword length of a ternary error-correcting code of 128 symbols, 166 information bits can be transmitted during 128 ternary symbols, which is equivalent to 1.29 information bits per period of one clock pulse. The probability of a bit error in the received characters is   at a ratio of   = -1.11 dB.
Within the framework of the federal project "Personnel training and scientific foundation for the electronic industry" according to the state assignment for the performance of research work "Development of a technique for prototyping an electronic component base at domestic microelectronic industries based on the MPW service (FSMR-2023-0008)", the architecture of the encoding and decoding unit of the proposed cascade code is developed and implemented in the layout of an integrated circuit. The results of the chip design show that the transition from a binary alphabet of symbols to a ternary one is effectively implemented in the integrated circuit layout both in terms of area and energy consumption and possible limiting clock frequency.

Keywords:

error correcting coding, concatenated codes, algebraic codes, bit error rate, ternary code, encoder

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