Accuracy Estimation and Synthesis of Nonlinear Direct Mathematical Operations on Bitstreams


DOI: 10.34759/trd-2020-112-14

Аuthors

Romanov A. M.

MIREA — Russian Technological University (Lomonosov Institute of Fine Chemical Technologies), 78, Vernadsky prospect, Moscow, 119454, Russia

e-mail: romanov@mirea.ru

Abstract

Field programmable gate arrays (FPGA) are widely used in the aerospace industry, both for on-board devices and ground equipment. This paper is devoted to accuracy estimation and synthesis of nonlinear direct mathematical operations on bitstreams (DMOB). DMOB or direct processing of sigma-delta modulated bitstreams is a promising method to reduce the resource area consumption of the FPGA designs which allows to implement complex digital signal processing algorithms on the basis of radiation-resistant FPGAs as well as FPGAs produced by Russian vendors, the logical resources of which are significantly smaller than those of foreign counterparts in commercial versions. The estimates of nonlinear DMOB accuracy which were previously obtained were empirical and covered only a small set of mathematical operations in a limited range of possible implementation parameters. This paper proposes a new approach to accuracy analysis and synthesis of nonlinear DMOBs which allows to implement a wide range of nonlinear digital signal processing algorithms directly on sigma-delta modulated bitstreams providing a given accuracy. The key point of this paper is that nonlinear DMOBs implemented by combining input averaging filters and nonlinear mathematical operation perform linear interpolation of this mathematical operation, and the number of interpolation reference points depends on the filter window. This statement supported by a number of assumptions is analytically proved for a one-dimensional case, and it is experimentally confirmed with regard to a multidimensional case. All the assumptions used in the proof are analyzed in detail, and the conditions of the proposed method of applicability for real projects are formulated on the basis of the assumptions. Solutions described in this paper allow to achieve a flexible compromise on the nonlinear DMOB FPGA core area usage and the computation accuracy. The example of the implementation of bitstream multiplier demonstrates that the proposed solution is superior to the previously known and widely used analogue.

Keywords:

nonlinear bitstream mathematical operations, sigma-delta modulation, direct bitstream processing, field programmable gate arrays

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